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U2895B
Modulation PLL for GSM, DCS and PCS Systems
Description
The U2895B is a monolithic integrated circuit. It is realized using TEMIC's advanced silicon bipolar UHF5S technology. The device integrates a mixer, an I/Q modulator, a phase-frequency detector (PFD) with two synchronous programmable dividers, and a charge pump. The U2895B is designed for cellular phones such as GSM900, DCS1800, and PCS1900, applying a transmitter architecture at which the VCO operates at the TX output frequency. No duplexer is needed since the out-ofband noise is very low. The U2895B exhibits low power consumption. Broadband operation gives high flexibility for multi-band frequency mappings. The IC is available in a shrinked small-outline 28-pin package (SSO28). Electrostatic sensitive device. Observe precautions for handling.
Features
D D D D D D D
Supply voltage range 2.7 V to 5.5 V Current consumption 50 mA Power-down functions High-speed PFD and charge pump (CP) Small CP saturation voltages (0.5/0.6 V) Programmable dividers and CP polarity Low-current standby mode
Benefits
D Novel TX architecture saves filter costs D Extended battery operating time without duplexer D Less board space (few external components) D VCO control without voltage doubler D Small SSO28 package D One device for all GSM bands
Block Diagram
I NI 1 2 MDLO Q NQ PUMIX PU MIXO MIXLO 3 28 27 12 19 25 20 22 23
MDO NMDO
5 6 +
90 2
Voltage reference Mixer
RF NRF
I/Q modulator 16 17 13 14 R1 divider N1 divider MUX PFD Charge pump 9 8 VSP
ND NND RD NRD
CPO
7 21
VS1 VS2 VS3
MC
15
Mode control 4 18 24 11 CPC 10 GNDP GND Figure 1. Block diagram
26
15048
Rev. A3, 30-Sep-98
1 (16)
U2895B
Ordering Information
Extended Type Number U2895B-AFSG3 Package SSO28 Remarks Taped and reeled
Pin Description
I NI MDLO GND MDO NMDO 1 2 3 4 5 6 28 27 26 25 24 Q NQ VS3 MIXO GND
23 NRF 22 RF 21 VS2
VS1 7 VSP 8 CPO 9
20 MIXLO 19 18 17 16 15
12495
GNDP 10 CPC 11
PU GND NND ND MC
PUMIX 12 RD 13
NRD 14
Figure 2. Pinning
2 (16)
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12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 PUMIX RD NRD MC ND NND GND 1) PU MIXLO VS2 3) RF NRF GND 1) MIXO VS3 3) NQ Q
1)
Pin 1 2 3 4 5 6 7 8 9 10 11
Symbol I NI MDLO GND 1) MDO NMDO VS1 3) VSP CPO GNDP 2) CPC
Function In-phase baseband input Complementary to I I/Q-modulator LO input Negative supply I/Q-modulator output Complementary to MDO Positive supply (I/Q MOD) Pos. supply charge-pump Charge-pump output Neg. supply charge pump Charge-pump current control (input) Power-up, mixer only R-divider input Complementary to RD Mode control N-divider input Complementary to ND Negative supply Power-up, whole chip except mixer Mixer LO input Positive supply (MISC.) Mixer RF-input Complementary to RF Negative supply Mixer output Positive supply (mixer) Complementary to Q Quad.-phase baseband input
All GND pins must be connected to GND potential. No DC voltage between GND pins!
2)
Max. voltage between GNDP and GND pins 200 mV
v
3)
The maximum permissible voltage difference between pins VS1, VS2 and VS3 is mV.
v200
Rev. A3, 30-Sep-98
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1) VS = 2.7 to 5.5 V, Tamb = -20C to +85C, final test at 25C
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Electrical Characteristics Thermal Resistance Operating Range
Parameters Junction ambient SSO28 Parameters Supply voltage Ambient temperature Symbol VVS#, VVSP Tamb Symbol RthJA | ICPC | Tamb Tstg 5 -20 to +85 -40 to +125 Value 2.7 to 5.5 -20 to +85 Value 130 Unit K/W Unit V C mA C C
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Absolute Maximum Ratings
Parameters Supply voltage VS1, VS2, VS3 Supply voltage charge pump VSP Voltage at any input Current at any input / output pin except CPC CPC output currents Ambient temperature Storage temperature Symbol VVS# VVSP VVi# | II# | | IO# | -0.5
Rev. A3, 30-Sep-98 Active (VPU = VS) Standby (VPU = 0) Supply current IVS2 pp y Active (VPU = VS) Standby (VPU = 0) Supply current IVS3 pp y Active (VPUMIX = VS) Standby (VPUMIX = 0) 1) Supply current IVSP Active (VPU = VS, CPC open) Standby (VPU = 0) N & R divider inputs ND, NND & RD, NRD N:1 divider frequency 50-W source R:1 divider frequency 50-W source Input impedance Active & standby Input sensitivity 50-W source Supply current IVS1 pp y Parameters DC supply Supply voltages VS# Supply voltage VSP Mean value, measured with FND = 151 MHz, FRD = 150 MHz, current vs. time, see page 6, figure 3. VVS1 = VVS2 = VVS3 Test Conditions / Pin fND fRD ZRD, ZND VRD, VND Symbol IVSPY IVS1A IVS1Y IVS2A IVS2Y IVS3A IVS3Y IVSPA VVS# VVSP 2.7 VVS# - 0.3 100 100 1 k 20 Min.
v
vV
5.5 VVS +0.5 2
Value
Typ.
1.4
13
17
17
VSP
v 5.5
U2895B
Max.
600 600 2 pF 200
22 20 22 20 17 30 1.8
5.5 5.5
20
MHz MHz - mVrms
Unit V V V mA
Unit
mA
mA
mA
mA
mA
mA
mA
mA
V V
3 (16)
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4) 3)
6)
5)
VS = 2.7 to 5.5 V, Tamb = -20C to +85C, final test at 25C
Electrical Characteristics (continued)
U2895B
4 (16) Differential (preferres) I/Q modulator LO input MDLO MDLO Frequency range Input impedance Active & standby Input level 50-W source I/Q modulator outputs MDO, NMDO DC current VMDO, VNMDO = VS Voltage compliance VMDO, VNMDO = VC MDO output level 500 W to VS 5) (differential) Carrier suppression 5) Sideband suppression 5) IF spurious 5) fLO 3 fmod 5) Noise @ 400 kHz off carrier Frequency range Mixer (900 MHz) RF input level 900 MHz LO-spurious at @ P9MIXLO = -10 dBm RF/NRF port @ P9RF = -15 dBm MIXLO input level 0.05 to 2 GHz MIXO (100-W load) Frequency range Output level 6) @ P9MIXLO = -15 dBm Carrier suppression @ P9MIXLO = -15 dBm MD_IQ AC voltage 4) Parameters Test Conditions / Pin Phase-frequency detector (PFD) PFD operation fND = 450 MHz, N = 2 fRD = 450 MHz, R = 2 Frequency comparison fND = 600 MHz, N = 2 only 3) fRD = 450 MHz, R = 2 I/Q modulator baseband inputs I, NI & Q, NQ DC voltage Referred to GND -1 dB compression point (CP-1) With typical drive levels at MDLO- & I/Q-inputs PFD can be used as a frequency comparator until 300 MHz for loop acquisition Frequency range Referred to GND IMDO, INMDO VCMDO, VCNMDO VS - 0.7 PMDO 120 VI, VNI, VQ, VNQ fIO ACI, ACNI, ACQ, ACNQ ACDI, ACDQ P9MIXLO fMIXO P9MIXO CS9MIXO Symbol CSMDO SSMDO SPMDO NMDO fMDO fMDLO ZMDLO PMDLO P9RF SP9RF fPFD fFD Min. 1.35 -20 -22 50 -23 100 -32 -35 -20 100 DC 50 VS1/2 Typ. -35 -40 -50 250 -15 400 200 2.4 70
Single-ended operation (complementary baseband input is AC-grounded) leads to reduced linearity (degrading suppression of odd harmonics)
VS1/2 + 0.1 1
Rev. A3, 30-Sep-98 Max. -45 -115 450 -12 450 -17 -40 5.5 150 -10 850 300 225 dBc dBc dBc dBc/Hz MHz dBm MHz mVrms dBc mA V mVrms mVpp MHz mVpp MHz MHz MHz dBm dBm dBm Unit
W
V
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6)
Rev. A3, 30-Sep-98
8) 7)
VS = 2.7 to 5.5 V, Tamb = -20C to +85C, final test at 25C
Electrical Characteristics (continued)
VCPO voltage range VCPO Charge-pump control input CPC Compensation capacitor CCPC Short circuit current 8) CPC grounded | ICPCK | Mode control Sink current VMC = VS IMC Power-up input PU (power-up for all functions, except mixer) Settling time Output power within 10% SPU of steady state values High level Active VPUH Low level Standby VPUL High-level current Active, VPUH = 2.2 V IPUH Low-level current Standby, VPUL = 0.4 V IPUL Power-up input PUMIX (power-up for mixer only) Settling time Output power within 10% tsetl of steady state values High level Active VPUMIXH Low level Standby VPUMIXL High-level current Active, VPUMIXH = 2.2 V IPUMIXH Low-level current Standby, IPUMIXL VPUMIXL = 0.4 V
Parameters Test Conditions / Pin Symbol Mixer (1900 MHz) RF input level 0.5 to 2 GHz P19RF LO-spurious at @ P19MIXLO = -10 dBm SP19RF RF/NRF ports @ P19RF = -15 dBm MIXLO input level 0.05 to 2 GHz P19MIXLO MIXO (100 W load) Output level 6) @ P19MIXLO = -17 dBm P19MIXO Carrier suppression @ P19MIXLO = -17 dBm CS19MIXO Charge-pump output CPO (VVSP = 5 V; VCPO = 2.5 V) Pump-current p pulse CPC open for DC | ICPO | p RCPC = 2.2 k 7) | ICPO 2 | PCPC = 680 7) | ICPO_4 | TK pump current Tk_| ICPC | Mismatch source / sink (ICPOSI - ICPOSO)/ICPOSI MICPO current ICPOSO = Isourc ICPOSI = Isink Sensivity to VSP SICPO DI | CPO | | DVSP | VSP I CPO
See figure 7.
RCPC: external resistor to GND for charge-pump current control
- 1 dB compression point (CP - 1)
Min.
500 1.6
-20
-22
-23
2.0 0
2.0 0
0.5
0.7 1.4 3
-1
-1
Typ.
50
50
60
55
5
5
1 2 4
VVSP-0.6
U2895B
Max.
VS2 0.4 75 20
-12
-17 -40
0.4 75 20
0.1
1.3 2.6 5 15 0.1
10
10
mA mA mA %/100K -
mVrms dBc
dBm
dBm dBm
Unit
pF mA
mA mA
mA mA
mA
ms
ms
5 (16) V V V V V -
U2895B
Supply Current of the Charge Pump IVSP vs. Time
Due to the pulsed operation of the charge pump, the current into the charge-pump supply pin VSP is not constant. Depending on I (see figure 6) and the phase difference at the phase detector inputs, the current IVSP over time varies. Basically, the total current is the sum of the quiescent current, the charge-/discharge current, and - after each phase comparison cycle - a current spike (see figure 3).
Initial Charge-Pump Current after Power-Up
Due to stability reasons, the reference current generator for the charge pump needs an external capacitor (>500 pF from CPC to GND). After power-up, only the on-chip generated current I = ICPCK is available for charging the external capacitor. Due to the charge pump's architecture, the charge pump current will be 2 I = 2 ICPCK until the voltage on CPC has reached the reference voltage (1.1 V). The following figures illustrate this behavior. ICPCK x RCPC
Up Down 5I IVSP 3I I 2I ICPO t -2I
14552
VCPC VRef
t
t1
t0 2x ICPCK
t2
t
ICPC I
Figure 3. Supply current of the charge pump = f(t)
Internal current, I, |ICPC| and ICPC vs. RCPC RCPC CPC open 2.2 kW 680 W (typical values) I 0.5 mA 1.0 mA 2.0 mA |ICPCO| 1 mA 2 mA 4 mA ICPC 0 -0.5 mA -1.5 mA t1 t
14561
Time t1 can be calculated as t1 (1.1 V CCPC)/ICPCK e.g., CCPC = 1 nF, ICPCK = 2.7 mA t1 0.4 ms. Time t2 can be calculated as t2 (RCPC/2200 W) CCPC e.g., CCPC = 1 nF, RCPC = 2200 W t2 1.1 ms
Figure 4.
[ [ [ [
The behavior of |ICPO| after power-up can be very advantageous for a fast settling of the loop. By using larger capacitors (>1 nF), an even longer period with maximum charge pump current is possible. Ramp-up time for the internal band gap reference is about 1 ms. This time has to be added to the times calculated for the charge pump reference.
6 (16)
Rev. A3, 30-Sep-98
U2895B
Mode Selection
The device can be programmed to different modes via an external resistor RMODE (including short, open) from Pin MC to VS2. The mode is distinguished from specific N-, R-divider ratios, and the polarity of the charge pump current.
Mode 1 2 3 4 5
1) 2) 3) 4)
Mode Selection Resistance between Pin MC and Pin VS2 0 (<50 W) 2.7 kW (5%) 10 kW (5%) 47 kW (5%) (>1 MW)
N-Divider
R-Divider
CPO Current Polarity 4) fN < fR 1) fN > fR 1) Sink Source Source Source Sink Source Sink Sink Sink Source
Application
R
1:1 1:1 1:1 2:1 2:1
1:1 1:1 2:1 2:1 2:1
PCN/PCS 2) GSM 3)
Frequencies referred to PFD input LO frequencies below VCO frequency LO frequencies above VCO frequency Sink current into Pin CPO. Source: current out from Pin CPO.
Equivalent Circuits at the IC's Pins
VBias_MDLO VS1 MDO NMDO 2230 250 MDLO NI, NQ VRef_input VRef_MDLO 30 pF GND Baseband input LO input Figure 5. I/Q modulator Output
15049
2230 L,Q
VRef_output
1 k RF 890 NRF
VBias_RF
1 k
VBias_LO
VS3
890 MIXLO
1.6 k
1.6 k
6.3 VRef_LO 40 pF MIXO
VRef_RF
GND LO input Output Figure 6. Mixer
14554
Rev. A3, 30-Sep-98
7 (16)
U2895B
VS2 4 ICPCK /4 up 1.1 V 2230 GND n 2 = Transistor with an emitter area-factor of "n"
14555
4 4
VSP
I CPC
down Ref
2I CPO 2I
Ref
2
GNDP
Figure 7. Charge pump VS2
ND/RD 2 k NND/NRD 2 k PU, PUMIX 20 k
VRef_div
GND
14557
GND
14556
Figure 8. Dividers VS2
Figure 9. Power-up
N-divider Logic R-divider MUX MC 2x 60 A
C (U) 2.5 pF @ 2 V C (U) is a non-linear junction capacitance
14559
Figure 11. ESD-protection diodes
GND Figure 10. Mode control
14898
8 (16)
Rev. A3, 30-Sep-98
U2895B
Application Hints
Interfacing For some of the baseband ICs it may be necessary to reduce the I/Q voltage swing so that it can be handled by the U2895B. In those cases, the following circuitry can be used.
RMode I R1 Baseband IC NI Q R1 NQ R1
14914
Mode Control
U2895B VS2
U2895B VS2
R1 I R2 NI Q R2 NQ U2895B
RMode1 MC a) any single mode U2895B VS2
RMode2 MC
b) any 2 modes U2895B VS2 RMode
Figure 12. Interfacing the U2895B to I/Q baseband circuits
RMode MC
MC 36 k or 10 k d) mode 5 & mode 3 or mode 4
15050
Due to a possible current offset in the differential baseband inputs of the U2895B the best values for the carrier suppression of the I/Q modulator can be achieved with voltage driven I/NI-, and Q/NQ-inputs. A value of Rsource = R2/2*RS 1.5 kW should be realized. RS is the sum of R1 (above drawing) and the output resistance of the baseband IC.
c) any mode & mode 5
v
Figure 14. Application examples for programming different modes
Charg-Pump Current Programming
GND CPC RCPC1 = 2.2 k RCPC2 = 1 k (incl. rds_on of FET) RCPC1 RCPC2 `H' |I | = 4 mA CPO `L' |ICPO | = 2 mA
12497
1 nF
Figure 13. Programming the charge-pump current
Rev. A3, 30-Sep-98
9 (16)
U2895B
Test Circuit
Baseband input <450 mVpp
VAC VDC
Baseband input <450 mVpp
VAC
1 2
28 27
VDC
1.35 V - VS1/2 +0.1 V Modulator LO input 3 50 4 5 Modulator outputs 6 50 VS VSP VDO PFD Pulse output 1 nF 50 7 8 9 10 11 12 PFD input
50
1.35 V -VS1/2 +0.1 V 26 25 24 23 22 21 20 19 18 17 16 50 14 15 PFD input VS Mixer output
50 Mixer input VS Mixer LO input
13
Power-up VS Bias voltage for charge pump output: 0.5 V < VDO < VSP - 0.5 V
Mode control VS2 R1 R2 R3
13315
Figure 15. Test circuit
10 (16)
Rev. A3, 30-Sep-98
U2895B
Application Circuit for DCS1800 (1710 - 1785 MHz)
Baseband processor
Attention! Differential source impedance seen by the I/NI, Q/NQ inputs should not exceed 1000 Ohms
MDLO 2nd IF 816 MHz, -15 dBm VS 10 nH 10 pF 100 pF 330 330 100 nH 100 pF 100 nH 100 pF 100 pF 13 100 nH 14 100 pF 220 5 6 16 17 12 nH 12 pF
r_diff
50 50
MIXLO 1st IF
10 pF
100pF
100pF
1288...1323 MHz 1302...1377 MHz
1
2
3
28 27
12
19
25
20 22
100 pF 10 100 pF
560 100
RF TX 850...915 MHz 1710...1785 MHz
90 2
Voltage reference Mixer
23
+ I/Q modulator 8 N1 divider MUX R1 divider PFD Charge pump 9
MQES50-902 VCO MQE5A1-1747 100 pF VSP 100 pF 10 330 1.2 nF 6.8 nF 100 pF 250 22 pF
VSO
7 21
15
Mode control 4 18 24 11 10
100 pF 26 100 pF
R mode control
680W...2.2 kW
470 pF
15051
Figure 16. Application circuit (power-up and 680 W to 2.2 kW charge-pump control is not shown)
Measurements
Modulation-Loop Settling Time
As valid for all PLL loops the settling time depends on several factors. The following figure is an extraction from measurements performed in an arrangement like the application circuit. It shows that a loop settling time of a few ms can be achieved.
CPC: 1 k to GND
CPC `open'
Vertical: VCO tuning voltage 1 V/Div Horizontal: Time 1 ms/Div
Figure 17.
Rev. A3, 30-Sep-98
11 (16)
U2895B
Modulation Spectrum & Phase Error
Application for GSM900
Figure 18. Modulation spectrum
Figure 19. Phase error
12 (16)
Rev. A3, 30-Sep-98
U2895B
Application for DCS1800
Figure 20. Modulation spectrum
Figure 21. Phase error
Rev. A3, 30-Sep-98
13 (16)
U2895B
Application for PCS1900
PCS 1900 USER TOL.
Figure 22. Modulation spectrum
PCS 1900
Figure 23. Phase error
Complete transmitters (including PA) were measured. The test equipment was the R & S CMD55 performing standard approval tests. Typically, the spectrum @ 400 kHz off the center carrier frequency is approximately -65 dB attenuated (-60 dB according specificarion). The
corresponding rms phase error is in the range of about 3. Dimensioning the loop-filters allows you to optimize spectral-and phase error performance.
14 (16)
Rev. A3, 30-Sep-98
U2895B
Package Information
Package SSO28
Dimensions in mm
9.10 9.01 5.7 5.3 4.5 4.3
1.30 0.25 0.65 8.45 28 15 0.15 0.05 6.6 6.3 0.15
technical drawings according to DIN specifications
13018
1
14
Rev. A3, 30-Sep-98
15 (16)
U2895B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2594, Fax number: 49 ( 0 ) 7131 67 2423
16 (16)
Rev. A3, 30-Sep-98

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Price & Availability of U2895B

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